Nvidia promised to double chip shipments. Memory and substations may not let it.
Key takeaways
- Nvidia's purchase commitments to suppliers more than doubled to $279 billion, up from $119 billion the previous quarter.
- Jensen Huang said on 17 September that Nvidia expects to sell twice as many chips in 2027 as in 2026, measured in units rather than revenue.
- HBM needs roughly three times the wafer input of standard DRAM for the same bit output, and Nvidia expects the memory bottleneck to last into early 2028.
- Transformer and substation lead times, not fab capacity, are now the practical ceiling on how fast new data centres get energised.
$279 billion. That is the value of Nvidia's purchase commitments to suppliers in its latest regulatory filing, more than double the $119 billion it reported a quarter earlier. This is not a forecast of what customers might spend. It is money Nvidia has already promised to memory makers, packagers and everyone else who feeds a rack.
The promise that spending is buying came on 17 September, when Jensen Huang told a summit attended by King Charles III in Scotland that Nvidia expects to sell twice as many chips next year as it will this year. Units, not revenue. The company has separately projected roughly 70 percent revenue growth for the fiscal year ending January 2028, which would take revenue to almost $673 billion.
Doubling units is the harder half of that pair. Revenue can grow on price. Units have to come out of a fab and then get plugged into something that is actually energised.
The memory bottleneck runs past the deadline
Conventional DRAM supply stays tight through 2027 because fabs keep converting standard wafer starts to high bandwidth memory. The arithmetic behind that conversion is unforgiving. HBM requires roughly three times the wafer input of standard DRAM to produce the same number of bits, so every wafer moved to HBM lowers total bit output even though wafer output has not changed at all.
Nvidia's own stated view is that the memory bottleneck lasts into early 2028. That is a year past the window in which it plans to be shipping double the chips. The gap between those two dates is the part worth sitting with, because nothing in Nvidia's control closes it.
The consumer end of that same pipe is already visible in what memory now costs. A 32GB DDR5 kit or a 2TB NVMe drive carries the price it does because of wafer allocation decisions made in Korean and Taiwanese fabs, not because of anything happening in retail.
The grid moves slower than the building
A data centre can be built in a few quarters. Steel, concrete, cooling, fit-out. High voltage transmission lines and substations cannot be built in a few quarters, and transformer lead times are now the practical ceiling on how fast any of this gets connected.
That is the constraint nobody puts on a slide. An operator can win the chip allocation, win the memory allocation, finish the shell on schedule, and then wait on a transformer that someone else ordered two years earlier.
What the bottleneck story changes
The AI hardware race has stopped being a contest about chip design. Interconnect fabric startups raising nine figures and Huawei pushing Ascend parts into the same 2027 window are competing for the same constrained physical inputs as everyone else, not for architectural elegance.
It also reframes who the important companies are. SK Hynix, Samsung and Micron set the ceiling on how many accelerators exist. Hitachi Energy, Siemens Energy and a handful of regional utilities set the ceiling on how many of them run.
So: the number to watch next is not Nvidia's guidance, which is a statement of intent. It is HBM as a share of total wafer starts, and the quoted lead time on a grid transformer. Neither of those appears in an earnings call, and neither is something Nvidia can buy its way past.
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