Future TechnologyHuawei just moved its Nvidia rival forward by nine months
Key takeaways
- The Ascend 960 arrives in Q1 2027 rather than Q3, nine months ahead of last year's published roadmap.
- Specs land at 2 PFLOPS FP8, 288GB of HBM and 9.6TB/s of bandwidth, roughly H200 territory on raw capability.
- Production volume, estimated near 4 million units by 2027, is a harder ceiling than the silicon itself.
- It is built without EUV lithography, which is the whole reason it matters as a policy result.
Nine months. That is how much time Huawei took off its own roadmap this week, when rotating chairman Wang Tao told the company's annual Shanghai summit that the Ascend 960DT arrives in the first quarter of 2027. The schedule Huawei published a year ago said the third quarter. Any Ascend 960 vs Nvidia comparison now has to happen a lot sooner than expected.
The specs worth writing down
The Ascend 960 lands at 2 PFLOPS at FP8 and 4 PFLOPS at FP4, with 288GB of HBM and 9.6TB/s of memory bandwidth. Against the 950 series, that doubles compute, memory capacity and interconnect in one step.
The scaling story sits above the individual chip. A single SuperPoD can chain up to 4,000 processors over optical cable, which is the configuration that matters for training runs rather than inference. The 960PR follows in the third quarter of 2027.
Ascend 960 vs Nvidia, honestly compared
On raw capability the 960 lands roughly in H200 territory. That is a real achievement and it is not parity. Analysts expect Nvidia's best parts to stay materially ahead through the second half of 2027, and nothing in the Shanghai announcement changes that.
The comparison people reach for, 960 against Nvidia's current flagship, is the wrong one. The useful question is what a Chinese buyer can actually deploy at scale in 2027, given that the alternative is an export licence they may not get. Memory capacity is where the 960 is genuinely competitive, and memory capacity decides which models fit at all.
Two ceilings, and only one is silicon
Production is the harder limit. Estimates put Huawei's total AI chip output near 4 million units by 2027. Nvidia ships more than that into a single hyperscaler procurement cycle, so a spec sheet win does not translate into a supply win.
The second ceiling is the interesting one. The Ascend 960 is built without EUV lithography, the machine class that export controls were written to withhold. Huawei is working around the constraint rather than removing it, which caps yield and raises cost per die in ways the announcement did not quantify.
Why the interconnect number matters more than the FLOPS
At 4,000 processors per SuperPoD, the bottleneck stops being the accelerator and becomes the fabric between them. That is the same problem Western vendors are spending heavily on, including Cornelis and its 205 million dollar raise for compute fabric. Huawei quoting 9.6TB/s per chip and optical cabling between nodes says it understands where the wall is.
What to watch
Export controls were designed to keep this exact chip from existing. It exists, it is nine months early, and it is made without the tool the controls were built around. That is a policy outcome as much as an engineering one, and it will feed straight into the regulation argument already running between industry leaders.
The number to watch is not the next spec announcement. It is Huawei's quarterly output, because 2 PFLOPS you cannot buy is worth nothing to the buyer standing in front of it.