A 2nm chip has nothing on it that is 2 nanometres wide
Key takeaways
- Nothing on a 2nm chip measures 2 nanometres. Node names stopped tracking any physical transistor dimension years ago and are now generational labels the foundries chose.
- Actual features are far larger: metal pitches sit in the 20 nanometre range and gate pitches around 45 nanometres.
- TSMC's own figures for N2 against N3 are up to 15 percent more speed, or up to 30 percent better efficiency, plus about 15 percent more density. A designer picks one end of that trade, not both.
- Transistor density, in millions of transistors per square millimetre, is the comparable number, and it is almost never the one on the spec sheet.
TSMC does not call its 2nm process 2nm. Internally the node is N2, and the company dropped nanometre figures from its node names back at N7. The number that ends up on the spec sheet of your next phone comes from marketing, not from a measurement.
Apple is putting an A20 in the iPhone 18 Pro models on a 2nm process. Google is moving Tensor G6 to 2nm. The figure will be on nearly every flagship spec sheet this autumn, and almost nobody explains what it refers to.
What a 2nm chip actually measures
Nothing on a 2nm chip is 2 nanometres across. Node names stopped mapping to a physical transistor dimension years ago, gate length included, and became generational labels the foundries chose for themselves. The real features are an order of magnitude larger: metal pitches sit in the 20 nanometre range and gate pitches around 45.
The number that does mean something is transistor density, usually quoted in millions of transistors per square millimetre. It is measurable, it is comparable between foundries, and it is almost never the number printed on the box.
What the shrink buys
TSMC's own framing for N2 against N3 is the honest version. Up to 15 percent more speed, or up to 30 percent better energy efficiency, plus roughly 15 percent more density.
Read the "or" carefully, because it is the whole thing. A chip designer picks a point on that curve and does not get both ends of it. Apple has historically spent the budget on efficiency, which is why iPhone performance gains look modest on paper while battery life quietly improves. The same node in a different product can be tuned the other way.
So: a node shrink is a low double digit percentage gain in one direction that somebody chose for you. It does not double anything, and a phone built on 2nm is not meaningfully faster than one built on 3nm.
Why the number shrinks in marketing and in effect
Each generation of these labels has delivered less than the one before it, and the naming hides that. When node names tracked a real dimension, halving the number meant something specific about how many transistors fit in a given area. Now the label advances on a schedule while the underlying gains get smaller.
This is also why the interesting hardware arguments have moved elsewhere. Whether a workload runs better on a GPU, a TPU, or a custom ASIC matters more for real performance than which node fabricated the thing. Memory is the other one, and CXMT moving G5 DRAM into mass production will affect more devices this year than any node transition.
What to watch
Transistor density figures rather than node names, whenever anyone publishes them. If you are buying a phone this autumn, the iPhone 18 lineup and its October preorder window is where the A20 shows up first. Current flagships on the previous Tensor generation, like the Google Pixel 10 Pro, are available on Amazon at prices that reflect being one node behind. One node behind is, by the numbers above, about 15 percent.
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