# What a silicon interposer does, and why TSMC is paying $2B for more

> What is a silicon interposer? The layer that links AI GPUs to HBM memory, and TSMC just signed a $2B deal for GlobalFoundries to make them in New York.

- Published: 2026-10-09
- Topic: [Computing](https://futuretechnologyhq.com/topic/computing/)
- URL: https://futuretechnologyhq.com/article/what-is-a-silicon-interposer-tsmc-globalfoundries-2b-deal/
- Publisher: [Future Technology](https://futuretechnologyhq.com/), free to read. Quote as "Future Technology" with a link to the article.

## Key points

- A silicon interposer is a thin slab of silicon wiring that sits under a GPU and its HBM memory stacks and connects them
- TSMC signed a $2B agreement with an initial five-year term for GlobalFoundries to make CoWoS-S interposers in Malta, New York
- Volume production starts ramping in the first half of 2028, so it does not ease today's shortage
- Packaging capacity, not only transistor capacity, now limits how many AI chips can ship

## Article

$2 billion is what TSMC has agreed to spend on a part most people have never heard of. On 8 October GlobalFoundries announced a deal, with an initial five-year term, to make silicon interposers for TSMC at its fab in Malta, New York. Volume production starts ramping in the first half of 2028.

The world's biggest chipmaker paying a rival to make anything is unusual. The reason is simple enough: an interposer is the wiring board that lets an AI GPU talk to its memory, and there are not enough of them.

## What is a silicon interposer

Very roughly, think of it as a tiny circuit board made of silicon instead of fibreglass. A modern AI accelerator is not one chip. It is a big processor die surrounded by several stacks of HBM, the high-bandwidth memory we explained in our guide to [DRAM, HBM and NAND](/article/dram-vs-hbm-vs-nand-memory-shortage-explained/). Those pieces sit side by side on the interposer, which carries thousands of tiny wires between them.

A normal package substrate cannot do this. Each HBM stack talks to the processor over an interface 1,024 bits wide, and HBM4 doubles that to 2,048. Routing that many connections at that density needs wiring patterned the way chips themselves are made, on silicon, using lithography.

### Where 2.5D packaging comes in

This arrangement is usually called 2.5D packaging. The chips are not stacked on top of each other, which would be 3D. They sit next to each other on a shared silicon base, which is why the half step exists. TSMC's version is called CoWoS, short for chip on wafer on substrate, and the GlobalFoundries deal covers interposers for the CoWoS-S variety.

## What the TSMC and GlobalFoundries deal covers

GlobalFoundries will make one component, the interposer, including embedded deep trench capacitors that smooth out power delivery. TSMC remains the customer and does the final assembly. No processor manufacturing moves to New York.

The companies have not said how much capacity will be installed, only that the agreement allows for expansion depending on demand. GlobalFoundries is not starting from zero, either. Its 65nm interposer process, called 65PKG, was already production-qualified at the Malta site in 2024.

## Why packaging became the bottleneck

TSMC can make leading-edge processor dies faster than it can package them. That gap has existed for a couple of years, and AI demand keeps widening it. The money behind that demand is visible in TSMC's own numbers: September revenue of NT$511.86 billion, up 54.6% on a year earlier.

Memory is the other half of the squeeze. We covered how [Micron sold most of its 2027 output](/article/micron-sold-most-of-2027-memory-shortage/) before the year started; every one of those HBM stacks needs an interposer seat to sit on. Shrinking transistors, like the [stacked CFET designs](/article/stacked-transistors-cfet-sram-52-percent-smaller/) we wrote about this week, does nothing for this particular problem.

## What to watch next

The 2028 date is the part that stings. This deal adds US capacity for the next generation of AI chips, not the current one. Watch for a capacity figure, and for whether other packaging makers sign similar agreements before then, because that tells you how long TSMC expects the packaging queue to last.

## Sources

- [Tom's Hardware](https://www.tomshardware.com/tech-industry/semiconductors/globalfoundries-to-produce-silicon-interposers-for-tsmcs-cowos-in-the-us-five-year-agreement-valued-at-usd2-billion)
- [The Register](https://www.theregister.com/systems/2026/10/08/tsmc-taps-globalfoundries-to-bolster-us-silicon-interposer-production-in-2b-deal/5302061)
- [DCD](https://www.datacenterdynamics.com/en/news/globalfoundries-signs-2bn-five-year-deal-with-tsmc-for-production-of-advanced-packaging-components/)
- [Runtime Wire](https://runtimewire.com/article/globalfoundries-tsmc-ai-interposer-deal)