# OpenAI and Synopsys are building a model that runs chip design tools

> GPT-Synopsys is a multi-year OpenAI and Synopsys project to build a model that operates chip design software, with early customer trials but no launch date.

- Published: 2026-10-08
- Topic: [AI](https://futuretechnologyhq.com/topic/ai/)
- URL: https://futuretechnologyhq.com/article/gpt-synopsys-openai-chip-design-model/
- Publisher: [Future Technology](https://futuretechnologyhq.com/), free to read. Quote as "Future Technology" with a link to the article.

## Key points

- GPT-Synopsys is meant to operate chip design software directly, running tools, reading results and iterating while engineers review.
- The deal is multi-year, but no price, revenue split or launch date has been disclosed.
- Synopsys says customer design data will not be used to train the model.

## Article

GPT-Synopsys is a model that will drive chip design software itself, rather than just answer questions about it. OpenAI and Synopsys announced the multi-year partnership at the turn of the month, and neither company has put a price, a revenue split or a launch date on it, according to [Interesting Engineering](https://interestingengineering.com/innovation/openai-synopsys-model-chip-design-eda-tools).

## What GPT-Synopsys actually does

An engineer sets a goal, such as a power, performance and area target, timing closure or verification closure. AI agents then run the Synopsys electronic design automation (EDA) tools, read the outputs, make design changes and repeat until they reach a result the engineer can review. In plain terms, the model takes the job of the person who keeps re-running the tools and tweaking the settings.

The model is designed to work with Synopsys.ai, its Autopilot agent platform, and the agent systems customers already use. It runs on OpenAI-hosted infrastructure, and the joint offering bundles compute, model access and software licences, per [Pulse 2.0](https://pulse2.com/openai-and-synopsys-partner-to-develop-gpt-synopsys-for-ai-native-chip-design/).

## The details that matter for chip makers

A chip design is a company's core intellectual property, so the data terms are the part worth sitting with. Synopsys says customer design data will not be used to train the model, is encrypted in transit and at rest, and comes with configurable retention, permission and audit controls.

OpenAI will license Synopsys' EDA tools to develop the model, and the companies plan joint research, go-to-market work and a shared revenue framework. Early engagements with semiconductor customers are under way, though none are named.

The speed claims need a careful read. Two days earlier Synopsys said its Autopilot deployments showed up to 50x faster verification closure, 20% higher coverage and a 30% productivity gain. Those are Synopsys' own figures, not independent results. OpenAI president Greg Brockman described the aim as "helping engineers explore more designs and get to a working chip faster."

## What to watch next

The first named customer is the signal to look for, followed by pricing and any independent measurement of how much design time the agents save. For context on what these tools have to handle, our piece on [Lam Research's stacked transistor design](/article/lam-research-cfet-stacked-transistors-sram/) covers where chip structures are heading, and the [RISC-V vs Arm vs x86 explainer](/article/risc-v-vs-arm-vs-x86-chip-architecture-explained/) covers the design layer above it.

## Sources

- [Interesting Engineering](https://interestingengineering.com/innovation/openai-synopsys-model-chip-design-eda-tools)
- [Pulse 2.0](https://pulse2.com/openai-and-synopsys-partner-to-develop-gpt-synopsys-for-ai-native-chip-design/)